// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2023, Mohammad Sayful Islam <Sayf.mohammad01@gmail.com> */

#include "ipq8074.dtsi"
#include "ipq8074-ac-cpu.dtsi"
#include "ipq8074-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {

	aliases {
		serial0 = &blsp1_uart5;
		serial1 = &blsp1_uart3;
		/*
		 * Aliases as required by u-boot
		 * to patch MAC addresses
		 */
		ethernet1 = &dp2;
		ethernet2 = &dp3;
		ethernet3 = &dp4;
		ethernet4 = &dp5;
		led-boot = &led_system_blue;
		led-running = &led_system_blue;
		led-failsafe = &led_system_red;
		led-upgrade = &led_system_green;
	};

	chosen {
		stdout-path = "serial0:115200n8";
		bootargs-append = " root=/dev/ubiblock0_0";
	};

	keys {
		compatible = "gpio-keys";
		pinctrl-0 = <&button_pins>;
		pinctrl-names = "default";

		reset-button {
			label = "reset";
			gpios = <&tlmm 52 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps-button {
			label = "wps";
			gpios = <&tlmm 67 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};
};

&tlmm {
	button_pins: button-state {
		pins = "gpio52", "gpio67";
		function = "gpio";
		drive-strength = <8>;
		bias-pull-up;
	};

	mdio_pins: mdio-state {
		mdc-pins {
			pins = "gpio68";
			function = "mdc";
			drive-strength = <8>;
			bias-pull-up;
		};

		mdio-pins {
			pins = "gpio69";
			function = "mdio";
			drive-strength = <8>;
			bias-pull-up;
		};
	};

	iot_pins: iot-state {
		recovery-pins {
			pins = "gpio22";
			function = "gpio";
			input;
		};

		reset-pins {
			pins = "gpio21";
			function = "gpio";
			bias-pull-up;
		};
	};
};

&blsp1_uart3 {
	status = "okay";

	pinctrl-0 = <&hsuart_pins &iot_pins>;
	pinctrl-names = "default";

	/* Silicon Labs EFR32MG21 IoT */
};

&blsp1_uart5 {
	status = "okay";
};

&prng {
	status = "okay";
};

&cryptobam {
	status = "okay";
};

&crypto {
	status = "okay";
};

&qpic_bam {
	status = "okay";
};

&qpic_nand {
	status = "okay";

	/*
	 * Bootloader will find the NAND DT node by the compatible and
	 * then "fixup" it by adding the partitions from the SMEM table
	 * using the legacy bindings thus making it impossible for us
	 * to change the partition table or utilize NVMEM for calibration.
	 * So add a dummy partitions node that bootloader will populate
	 * and set it as disabled so the kernel ignores it instead of
	 * printing warnings due to the broken way bootloader adds the
	 * partitions.
	 */
	partitions {
		status = "disabled";
	};

	nand@0 {
		reg = <0>;
		nand-ecc-strength = <4>;
		nand-ecc-step-size = <512>;
		nand-bus-width = <8>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "0:sbl1";
				reg = <0x0 0x100000>;
				read-only;
			};

			partition@100000 {
				label = "0:mibib";
				reg = <0x100000 0x100000>;
				read-only;
			};

			partition@200000 {
				label = "0:bootconfig";
				reg = <0x200000 0x80000>;
				read-only;
			};

			partition@280000 {
				label = "0:bootconfig1";
				reg = <0x280000 0x80000>;
				read-only;
			};

			partition@300000 {
				label = "0:qsee";
				reg = <0x300000 0x300000>;
				read-only;
			};

			partition@600000 {
				label = "0:qsee_1";
				reg = <0x600000 0x300000>;
				read-only;
			};

			partition@900000 {
				label = "0:devcfg";
				reg = <0x900000 0x80000>;
				read-only;
			};

			partition@980000 {
				label = "0:devcfg_1";
				reg = <0x980000 0x80000>;
				read-only;
			};

			partition@a00000 {
				label = "0:apdp";
				reg = <0xa00000 0x80000>;
				read-only;
			};

			partition@a80000 {
				label = "0:apdp_1";
				reg = <0xa80000 0x80000>;
				read-only;
			};

			partition@b00000 {
				label = "0:rpm";
				reg = <0xb00000 0x80000>;
				read-only;
			};

			partition@b80000 {
				label = "0:rpm_1";
				reg = <0xb80000 0x80000>;
				read-only;
			};

			partition@c00000 {
				label = "0:cdt";
				reg = <0xc00000 0x80000>;
				read-only;
			};

			partition@c80000 {
				label = "0:cdt_1";
				reg = <0xc80000 0x80000>;
				read-only;
			};

			partition@d00000 {
				label = "0:appsblenv";
				reg = <0xd00000 0x80000>;
			};

			partition@d80000 {
				label = "0:appsbl";
				reg = <0xd80000 0x100000>;
				read-only;
			};

			partition@e80000 {
				label = "0:appsbl_1";
				reg = <0xe80000 0x100000>;
				read-only;
			};

			partition@f80000 {
				label = "0:art";
				reg = <0xf80000 0x80000>;
				read-only;
			};

			partition@1000000 {
				label = "u_env";
				reg = <0x1000000 0x40000>;
			};

			partition@1040000 {
				label = "s_env";
				reg = <0x1040000 0x20000>;
			};

			partition@1060000 {
				label = "devinfo";
				reg = <0x1060000 0x20000>;
				read-only;
			};

			partition@1080000 {
				label = "kernel";
				reg = <0x1080000 0x9600000>;
			};

			partition@1680000 {
				label = "rootfs";
				reg = <0x1680000 0x9000000>;
			};

			partition@a680000 {
				label = "alt_kernel";
				reg = <0xa680000 0x9600000>;
			};

			partition@ac80000 {
				label = "alt_rootfs";
				reg = <0xac80000 0x9000000>;
			};
			partition@13c80000 {
				label = "sysdiag";
				reg = <0x13c80000 0x200000>;
				read-only;
			};
			partition@13e80000 {
				label = "0:ethphyfw";
				reg = <0x13e80000 0x80000>;
				read-only;
			};
			partition@13f00000 {
				label = "syscfg";
				reg = <0x13f00000 0xb800000>;
				read-only;
			};
			partition@1f700000 {
				label = "0:wififw";
				reg = <0x1f700000 0x900000>;
				read-only;
			};
		};
	};
};

&blsp1_i2c2 {
	status = "okay";

	led-controller@62 {
		compatible = "nxp,pca9633";
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0x62>;
		nxp,hw-blink;

		led_system_red: led@0 {
			reg = <0>;
			color = <LED_COLOR_ID_RED>;
			function = LED_FUNCTION_STATUS;
		};

		led_system_green: led@1 {
			reg = <1>;
			color = <LED_COLOR_ID_GREEN>;
			function = LED_FUNCTION_STATUS;
		};

		led_system_blue: led@2 {
			reg = <2>;
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_STATUS;
		};
	};
};

&mdio {
	status = "okay";

	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
	reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;

	ethernet-phy-package@0 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "qcom,qca8075-package";
		reg = <0>;

		qca8075_1: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
		};

		qca8075_2: ethernet-phy@2 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <2>;
		};

		qca8075_3: ethernet-phy@3 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <3>;
		};

		qca8075_4: ethernet-phy@4 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <4>;
		};
	};
};

&switch {
	status = "okay";

	switch_lan_bmp = <(ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>; /* lan port bitmap */
	switch_wan_bmp = <ESS_PORT2>; /* wan port bitmap */
	switch_mac_mode = <MAC_MODE_PSGMII>; /* mac mode for uniphy instance0*/

	qcom,port_phyinfo {
		port@2 {
			port_id = <2>;
			phy_address = <1>;
		};
		port@3 {
			port_id = <3>;
			phy_address = <2>;
		};
		port@4 {
			port_id = <4>;
			phy_address = <3>;
		};
		port@5 {
			port_id = <5>;
			phy_address = <4>;
		};
	};
};

&edma {
	status = "okay";
};

&dp2 {
	status = "okay";
	phy-handle = <&qca8075_1>;
	label = "wan";
};

&dp3 {
	status = "okay";
	phy-handle = <&qca8075_2>;
	label = "lan1";
};

&dp4 {
	status = "okay";
	phy-handle = <&qca8075_3>;
	label = "lan2";
};

&dp5 {
	status = "okay";
	phy-handle = <&qca8075_4>;
	label = "lan3";
};

&ssphy_0 {
	status = "okay";
};

&qusb_phy_0 {
	status = "okay";
};

&usb_0 {
	status = "okay";
};

