#include "vr9.dtsi"

#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/mips/lantiq_rcu_gphy.h>

/ {
	aliases {
		led-boot = &led_power;
		led-failsafe = &led_power;
		led-running = &led_power;
		led-upgrade = &led_power;

		led-dsl = &led_dsl;
		led-internet = &led_internet;
		led-wifi = &led_wlan5g;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x7f00000>;
	};

	keys: keys {
		compatible = "gpio-keys-polled";
		poll-interval = <100>;

		reset {
			label = "reset";
			gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wifi {
			label = "wifi";
			gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
			linux,code = <KEY_RFKILL>;
			linux,input-type = <EV_SW>;
		};

		wps {
			label = "wps";
			gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};
	};

	leds: leds {
		compatible = "gpio-leds";

		led_power: power {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio 46 GPIO_ACTIVE_LOW>;
			default-state = "keep";
		};

		led_dsl: dsl {
			label = "blue:dsl";
			gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
		};

		led_internet: internet {
			label = "blue:internet";
			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
		};

		usb {
			function = LED_FUNCTION_USB;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
			trigger-sources = <&ehci_port1>, <&ehci_port2>;
			linux,default-trigger = "usbport";
		};

		eth {
			function = LED_FUNCTION_LAN;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
		};

		wlan {
			function = LED_FUNCTION_WLAN;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
		};

		led_wlan5g: wifi {
			label = "blue:wlan5g";
			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
		};
	};

	usb_vbus: regulator-usb-vbus {
		compatible = "regulator-fixed";

		regulator-name = "USB_VBUS";

		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;

		gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};
};

&eth0 {
	nvmem-cells = <&macaddr_romfile_f100 0>;
	nvmem-cell-names = "mac-address";
};

&gphy0 {
	lantiq,gphy-mode = <GPHY_MODE_GE>;
};

&gphy1 {
	lantiq,gphy-mode = <GPHY_MODE_GE>;
};

&gpio {
	pinctrl-names = "default";
	pinctrl-0 = <&state_default>;

	state_default: pinmux {
		phy-rst {
			lantiq,pins = "io42";
			lantiq,pull = <0>;
			lantiq,open-drain = <0>;
			lantiq,output = <1>;
		};
		pcie-rst {
			lantiq,pins = "io38";
			lantiq,pull = <0>;
			lantiq,output = <1>;
		};
	};
};

&gswip {
	pinctrl-0 = <&mdio_pins>, <&gphy0_led1_pins>, <&gphy1_led1_pins>;
	pinctrl-names = "default";
};

&gswip_mdio {
	phy0: ethernet-phy@0 {
		reg = <0x0>;
		// reset-gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
	};
	phy5: ethernet-phy@5 {
		reg = <0x5>;
	};
	phy11: ethernet-phy@11 {
		reg = <0x11>;
	};
	phy13: ethernet-phy@13 {
		reg = <0x13>;
	};
};

&gswip_ports {
	port@0 {
		reg = <0>;
		label = "lan3";
		phy-mode = "rgmii";
		phy-handle = <&phy0>;
	};
	port@2 {
		reg = <2>;
		label = "lan2";
		phy-mode = "internal";
		phy-handle = <&phy11>;
	};
	port@4 {
		reg = <4>;
		label = "lan1";
		phy-mode = "internal";
		phy-handle = <&phy13>;
	};
	port@5 {
		reg = <5>;
		label = "lan4";
		phy-mode = "rgmii";
		phy-handle = <&phy5>;
	};
};

&pcie0 {
	pcie@0 {
		reg = <0 0 0 0 0>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		device_type = "pci";

		wifi@0,0 {
			reg = <0 0 0 0 0>;
			mediatek,mtd-eeprom = <&radio 0x0000>;
			big-endian;
			ieee80211-freq-limit = <5000000 6000000>;
			nvmem-cells = <&macaddr_romfile_f100 2>;
			nvmem-cell-names = "mac-address";
		};
	};
};

&pci0 {
	status = "okay";
	reset-gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};

&spi {
	status = "okay";

	flash@4 {
		compatible = "jedec,spi-nor";
		reg = <4>;
		spi-max-frequency = <33250000>;
		m25p,fast-read;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				reg = <0x0 0x20000>;
				label = "u-boot";
				read-only;
			};

			partition@20000 {
				reg = <0x20000 0xf90000>;
				label = "firmware";
			};

			partition@fb0000 {
				reg = <0xfb0000 0x10000>;
				label = "radioDECT";
				read-only;
			};

			partition@fc0000 {
				reg = <0xfc0000 0x10000>;
				label = "config";
				read-only;
			};

			romfile: partition@fd0000 {
				reg = <0xfd0000 0x10000>;
				label = "romfile";
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					macaddr_romfile_f100: macaddr@f100 {
						compatible = "mac-base";
						reg = <0xf100 0x6>;
						#nvmem-cell-cells = <1>;
					};
				};
			};

			partition@fe0000 {
				reg = <0xfe0000 0x10000>;
				label = "rom";
				read-only;
			};

			radio: partition@ff0000 {
				reg = <0xff0000 0x10000>;
				label = "radio";
				read-only;
			};
		};
	};
};

&usb_phy0 {
	status = "okay";
};

&usb_phy1 {
	status = "okay";
};

&usb0 {
	status = "okay";
	vbus-supply = <&usb_vbus>;
};

&usb1 {
	status = "okay";
	vbus-supply = <&usb_vbus>;
};
