// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "qcom-ipq4019.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/soc/qcom,tcsr.h>
#include <dt-bindings/leds/common.h>

/ {
	chosen {
		bootargs-append = " ubi.mtd=ubi root=/dev/ubiblock0_1";
	};

	aliases {
		led-boot = &led_sys;
		led-failsafe = &led_sys;
		led-running = &led_sys;
		led-upgrade = &led_sys;
	};

	soc {
		tcsr@1949000 {
			compatible = "qcom,tcsr";
			reg = <0x1949000 0x100>;
			qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
		};

		tcsr@194b000 {
			compatible = "qcom,tcsr";
			reg = <0x194b000 0x100>;
			qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
		};

		ess_tcsr@1953000 {
			compatible = "qcom,tcsr";
			reg = <0x1953000 0x1000>;
			qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
		};

		tcsr@1957000 {
			compatible = "qcom,tcsr";
			reg = <0x1957000 0x100>;
			qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_sys: led-0 {
			gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_POWER;
		};

		led-1 {
			gpios = <&tlmm 32 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "phy0tpt";
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_WLAN;
			function-enumerator = <0>;
		};

		led-2 {
			gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "phy1tpt";
			color = <LED_COLOR_ID_BLUE>;
			function = LED_FUNCTION_WLAN;
			function-enumerator = <1>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&tlmm 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};
};

&watchdog {
	status = "okay";
};

&prng {
	status = "okay";
};

&crypto {
	status = "okay";
};

&blsp_dma {
	status = "okay";
};

&blsp1_spi1 {
	status = "okay";

	flash@0 {
		reg = <0>;
		compatible = "jedec,spi-nor";
		spi-max-frequency = <24000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "SBL1";
				reg = <0x0 0x40000>;
				read-only;
			};

			partition@40000 {
				label = "MIBIB";
				reg = <0x40000 0x20000>;
				read-only;
			};

			partition@60000 {
				label = "QSEE";
				reg = <0x60000 0x60000>;
				read-only;
			};

			partition@c0000 {
				label = "CDT";
				reg = <0xc0000 0x10000>;
				read-only;
			};

			partition@d0000 {
				label = "DDRPARAMS";
				reg = <0xd0000 0x10000>;
				read-only;
			};

			partition@e0000 {
				label = "APPSBLENV";
				reg = <0xe0000 0x10000>;
				read-only;
			};

			partition@f0000 {
				label = "APPSBL";
				reg = <0xf0000 0x80000>;
				read-only;
			};

			partition@170000 {
				label = "ART";
				reg = <0x170000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					precal_art_1000: precal@1000 {
						reg = <0x1000 0x2f20>;
					};

					precal_art_5000: precal@5000 {
						reg = <0x5000 0x2f20>;
					};
				};
			};
		};
	};
};

&nand {
	status = "okay";

	nand@0 {
		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			nand_rootfs: partition@0 {
				label = "ubi";
				/* reg defined in 64M/128M variant dts. */
			};
		};
	};
};

&blsp1_uart1 {
	pinctrl-0 = <&serial_0_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&cryptobam {
	status = "okay";
};

&pcie0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&pcie_pins>;
	perst-gpio = <&tlmm 4 GPIO_ACTIVE_LOW>;
	wake-gpio = <&tlmm 40 GPIO_ACTIVE_HIGH>;

	/* Free slot for use */
	bridge@0,0 {
		reg = <0x00000000 0 0 0 0>;
		#address-cells = <3>;
		#size-cells = <2>;
		ranges;
	};
};

&qpic_bam {
	status = "okay";
};

&sdhci {
	pinctrl-0 = <&sd_0_pins>;
	pinctrl-names = "default";
	vqmmc-supply = <&vqmmc>;
	status = "okay";
};

&tlmm {
	pcie_pins: pcie_pinmux {
		mux {
			pins = "gpio2";
			function = "gpio";
			output-low;
			bias-pull-down;
		};
	};

	mdio_pins: mdio_pinmux {
		mux_1 {
			pins = "gpio6";
			function = "mdio";
			bias-pull-up;
		};

		mux_2 {
			pins = "gpio7";
			function = "mdc";
			bias-pull-up;
		};
	};

	sd_0_pins: sd_0_pinmux {
		mux_1 {
			pins = "gpio23", "gpio24", "gpio25", "gpio26", "gpio28";
			function = "sdio";
			drive-strength = <10>;
		};

		mux_2 {
			pins = "gpio27";
			function = "sdio";
			drive-strength = <16>;
		};
	};

	serial_0_pins: serial0-pinmux {
		mux {
			pins = "gpio16", "gpio17";
			function = "blsp_uart0";
			bias-disable;
		};
	};
};

&mdio {
	status = "okay";
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
};

&ethphy0 {
	qcom,single-led-1000;
	qcom,single-led-100;
	qcom,single-led-10;
};

&ethphy1 {
	qcom,single-led-1000;
	qcom,single-led-100;
	qcom,single-led-10;
};

&ethphy2 {
	qcom,single-led-1000;
	qcom,single-led-100;
	qcom,single-led-10;
};

&ethphy3 {
	qcom,single-led-1000;
	qcom,single-led-100;
	qcom,single-led-10;
};

&ethphy4 {
	qcom,single-led-1000;
	qcom,single-led-100;
	qcom,single-led-10;
};

&gmac {
	status = "okay";
};

&switch {
	status = "okay";
};

&swport1 {
	status = "okay";

	label = "lan4";
};

&swport2 {
	status = "okay";

	label = "lan3";
};

&swport3 {
	status = "okay";

	label = "lan2";
};

&swport4 {
	status = "okay";

	label = "lan1";
};

&swport5 {
	status = "okay";
};

&usb3_ss_phy {
	status = "okay";
};

&usb3_hs_phy {
	status = "okay";
};

&usb3 {
	status = "okay";
};

&usb2_hs_phy {
	status = "okay";
};

&usb2 {
	status = "okay";
};

&vqmmc {
	status = "okay";
};

&wifi0 {
	status = "okay";
	nvmem-cell-names = "pre-calibration";
	nvmem-cells = <&precal_art_1000>;
	qcom,ath10k-calibration-variant = "P&W-R619AC";
};

&wifi1 {
	status = "okay";
	nvmem-cell-names = "pre-calibration";
	nvmem-cells = <&precal_art_5000>;
	qcom,ath10k-calibration-variant = "P&W-R619AC";
};
