// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include "mt7628an.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>

/ {
	model = "Minew G1-C";
	compatible = "minew,g1-c", "mediatek,mt7628an-soc";

	aliases {
		led-boot = &led_system;
		led-failsafe = &led_system;
		led-running = &led_system;
		led-upgrade = &led_system;
	};

	memory@0 {
		device_type = "memory";
		reg = <0x0 0x8000000>;
	};

	keys {
		compatible = "gpio-keys-polled";
		poll-interval = <20>;

		reset {
			label = "reset";
			gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};

	leds {
		compatible = "gpio-leds";

		led_system: system {
			label = "red:system";
			gpios = <&gpio 43 GPIO_ACTIVE_HIGH>;
			default-state = "on";
		};
	};

	gpio-export {
		compatible = "gpio-export";
		#size-cells = <0>;

		ws2812 {
			gpio-export,name = "ws2812";
			gpio-export,output = <1>;
			gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
		};

		nrf_power {
			gpio-export,name = "nrf_power";
			gpio-export,output = <1>;
			gpios = <&gpio 45 GPIO_ACTIVE_HIGH>;
		};
	};
};

&state_default {
	gpio {
		groups = "gpio";
		function = "gpio";
	};

	p0led_an {
		groups = "p0led_an";
		function = "gpio";
	};

	uart1 {
		groups = "uart1";
		function = "gpio";
	};

	wdt {
		groups = "wdt";
		function = "gpio";
	};
};

&spi0 {
	status = "okay";

	pinctrl-names = "default";
	pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>;

	m25p80@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <40000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
			};

			factory: partition@40000 {
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0xfb0000>;
			};
		};
	};
};

&ethernet {
	nvmem-cells = <&macaddr_factory_28>;
	nvmem-cell-names = "mac-address";
};

&esw {
	mediatek,portmap = <0x3e>;
};

&wmac {
	status = "okay";

	mediatek,mtd-eeprom = <&factory 0x0>;
};

&sdhci {
	status = "okay";
	mediatek,cd-high;
};

&factory {
	compatible = "nvmem-cells";
	#address-cells = <1>;
	#size-cells = <1>;

	macaddr_factory_28: macaddr@28 {
		reg = <0x28 0x6>;
	};
};
